Features

• System modes control (startup, sleep, stop and active)

• Power management (cyclic wake)

• Control of system voltage regulators with diagnosis (overload, short, overvoltage)

• Fail safe mode detection and operation in case of system errors (watchdog fail)

• Wake-up sources configuration and management (LIN, MON, GPIOs)

• System error logging

Introduction

The purpose of the power management unit is to ensure the fail safe behavior of the system IC. Therefore the power management unit controls all system modes including the corresponding transitions. The power management unit is responsible for generating all needed voltage supplies for the embedded MCU (VDDC,VDDP) and the external supply (VDDEXT). Additionally, the PMU provides well defined sequences for the system mode transitions and generates hierarchical reset priorities. The reset priorities control the reset behavior of all system functionalities especially the reset behavior of the embedded MCU. All these functions are controlled by finite state machines. The system master functionality of the PMU requires the generation of an independent logic supply and system clock. Therefore the PMU has a module internal logic supply and system clock which works independently of the MCU clock.